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詹陈长--助理教授

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詹陈长教授长期从事模拟、混合信号和电源管理集成路与系统的分析和设计。迄今为止发表了1本专著及>40篇SCI/EI学术论文,已授权5项中国专利、4项美国专利。詹教授获得过IEEE ISIC´2009最佳论文奖、IEEE EDSSC´2010及IEEE ISCAS´2011最佳学生论文奖。他是IEEE APCCAS´2014的审稿委员会成员, Hindawi APEC期刊客座编辑,同时他还担任众多国际知名期刊和会议的特邀审稿人。

教育经历

2007-2011,香港科技大学电子及计算机工程学,博士

2004-2007,复旦大学微电子学及固体电子学,硕士

2000-2004,复旦大学电子信息科学与技术,学士

工作经历

2014至今,南方科技大学,助理教授

2012-2014,美国高通公司,高级工程师

2011-2012,香港科技大学,博士后研究员

研究简介

电源管理、能量收集集成电路与系统

模拟与混合信号集成电路

低功耗集成电路设计方法

代表文章

[J10]  Q. Huang, C. Zhan, and J. Burm, “A 30 MHz Voltage-Mode Buck Converter Using Delay-Line-Based PWM Control,” IEEE Trans. Circ. Syst. II: Exp. Briefs,https://doi.org/10.1109/TCSII.2017.2764048.

 

[J09]  Y. Liu, C. Zhan and L. Wang, "An ultra-low power subthreshold CMOS voltage reference (CVR) without requiring resistors or BJTs," IEEE Trans. on Very Large Scale Integration (VLSI) Systems, https://doi.org/10.1109/TVLSI.2017.2754442.

 

[J08]  L. Wang, C. Zhan, J. Tang, S. Zhao, G. Cai, Y. Liu, Q. Huang and G. Li, "Analysis and design of a current-mode bandgap reference with high power supply ripple rejection," Microelectronics Journal, vol. 68, pp. 7-13, Aug. 2017.https://doi.org/10.1016/j.mejo.2017.08.011.

 

[J07]  Q. Huang, C. Zhan and J. Burm, "A low-complexity locking-accelerated digital PLL with multi-output bang-bang phase detector," Microelectronics Journal, vol. 67, pp. 19-24, Jul. 2017. https://doi.org/10.1016/j.mejo.2017.07.004.

 

[J06]  L. Wang, C. Zhan, J. Tang and G. Li, “An amplifier-offset-insensitive and high PSRR subthreshold CMOS voltage reference.” Int’l J. Circ. Theor. Appl., pp. 1-13, Jul. 2017.https://doi.org/10.1002/cta.2383.

 

[J05]  Q. Huang, H. Joo, J. Kim, C. Zhan and J. Burm, "An energy-efficient frequency domain CMOS temperature sensor with switched Vernier time-to-digital conversion," IEEE Sensors Journal, vol. 17, no. 10, pp. 3001-3011, May 2017.https://doi.org/10.1109/JSEN.2017.2686442.

 

[J04]  C. Zhan and W. H. Ki, “Analysis and design of output-capacitor-free low-dropout regulators with low quiescent current and high power supply rejection,” IEEE Tran. Circ. Syst. I: Reg. Papers, vol. 61, no. 2, pp. 625-636, Feb. 2014 (Top 5 most frequently downloaded paper in Feb. 2014). https://doi.org/10.1109/TCSI.2014.2300847.

 

[J03]  C. Zhan and W. H. Ki, “An output-capacitor-free adaptively biased low-dropout regulator with subthreshold undershoot-reduction for SoC,” IEEE Tran. Circ. Syst. I: Reg. Papers, vol. 59, no. 5, pp. 1119-1131, May 2012 (Invited to Special Issue on ISCAS 2011). https://doi.org/10.1109/TCSI.2012.2190675.

 

[J02]  W. H. Ki, K. M. Lai and C. Zhan, “Charge balance analysis and state transition analysis of hysteretic voltage mode switching converters,” IEEE Tran. Circ. Syst. I: Reg. Papers,vol. 58, no.5, pp. 1142-1153, May 2011. https://doi.org/10.1109/TCSI.2010.2089557.

 

[J01]  C. Zhan and W. H. Ki, “Output-capacitor-free adaptively biased low-dropout regulator for system-on-chips,” IEEE Tran. Circ. Syst. I: Reg. Papers, vol. 57, no. 5, pp. 1017-1028, May 2010 (Invited to Special Issue on ISCAS 2009).https://doi.org/10.1109/TCSI.2010.2046204.

招聘信息

课题组长期招收博士后(Research Fellow)、研究助理(Research Assistant)、联培博士、硕士生(URL: http://gs.sustc.edu.cn),也欢迎海内外访问学者以及交换生。有兴趣加入者请将申请邮件以及简历发送至zhancc@sustc.edu.cn。

联系方式

南方科技大学电子与电气工程系,深圳市南山区西丽学苑大道1088号,邮编518055

电话: (86)755-8801-5480 

电子邮件: zhancc@sustc.edu.cn

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地址:广东省深圳市南山区学苑大道1088号
          第二科研楼五层

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